Today, Protocol Labs is announcing a research collaboration with the Ethereum Foundation to design and develop at least one secure, efficient, and usable Verifiable Delay Function (VDF) construction.
VDFs are a recent addition to the set of cryptographic primitives – the first proposed constructions were published in June 2018. At a high level, a VDF is a function that takes at least some amount of time, the “delay,” to generate an output (even if you throw a bunch of processors at it), but whose output can be verified quickly and easily. For those who are interested in diving deeper, here is a succinct written explanation and here is a video describing VDFs and some candidate constructions.
Despite being relatively new, VDFs have already started to show up widely in blockchain research. They have been used in proofs of replication, leader election in consensus protocols, and randomness beacons, among other applications. Perhaps more importantly, the design and development of a secure and usable VDF construction would be a major breakthrough in applied cryptography and distributed systems, with applicability even beyond blockchains.
However, additional research is needed in order to design secure and efficient VDF constructions that can be used in practice. One crucial area of security that must be addressed is acceleration from specialized hardware. For most VDF constructions today, actors with access to custom hardware would be able to generate VDF outputs much more quickly than desired, potentially breaking the security of protocols that rely on VDFs.
It is clear that VDFs will be tremendously useful as cryptographic primitives. But much work remains to realize this potential in practice. Filecoin and Ethereum are both exploring the use of VDFs for their respective protocols. However, even beyond the applications to Filecoin, this is an investment towards building publicly-verifiable randomness and VDFs as novel tools in the arsenals of cryptographers and decentralization projects.
Protocol Labs and the Ethereum Foundation are evaluating and co-funding grants for preliminary research into the viability of building optimized ASICs for running a VDF.
For any VDF, there is knowable uncertainty around the length of the verifiable delay based on the speed and quality of the hardware being used to generate it. The intent of this collaboration is to reduce that uncertainty by developing VDF hardware optimizations upfront and sharing the hardware designs freely for anyone to use. If these preliminary efforts are successful, later efforts may include:
You can follow the progress of this research and get involved at vdfresearch.org. We are very interested in collaborating with other research groups and organizations, and will be announcing preliminary research grants soon. Stay tuned!